In the context of space missions, a shift in focus from large missions organized by space agencies to smaller and more frequent projects can be observed. These projects offer the opportunity to use new equipment and technologies, leading to a diversification of research activities. The LEOMEM project aims to develop an RRAM-based in-memory computing architecture for Internet-of-Space applications in Low-Earth-Orbit (LEO). It builds on the preliminary work of the MIMEC project, in which the focus was particularly on RRAM cells and circuit optimizations as well as on the development of a design framework. Progress has already been made at component level by developing a robust Enclosed Layout Transistor (ELT) and connecting it in series with an RRAM component. Chips with several arrays of this circuit have already been produced using IHP technology. The LEOMEM project is now aiming to comprehensively validate the radiation-resistant memory cells created in this way under extreme conditions. As part of the project, a multi-stage test and characterization procedure is being sought both before and after irradiation of the devices. Particular emphasis is placed on the evaluation of Total Ionizing Dose (TID) and Single Event Effects (SEE) under different radiation intensities. Temperature resistance is also being investigated. At system level, a framework for the design of RRAM systems has already been developed and used to solve various research questions. In the next phase of the work, the behavioural descriptions obtained from the characterization of the newly created radiation-resistant memory cells will be integrated into the framework. This will enable realistic design space exploration at various levels in order to create a storage system that is as energy-efficient but safe as possible. In addition to the circuit-based measures, adaptive measures such as the dynamic application of error correction codes can also be used. This is followed by the implementation of an optimal protection strategy in hardware and the realization of a fully integrated memory system with analog control, digital interfaces and controllers as an ASIC. This prototype can then be used to measure and optimize the overall system.