Feng Liu; Stephan Menzel
Poster at International Conference on Neuromorphic Computing and Engineering, Aachen, Germany, 3-6 June 2024
Feng Liu; Stephan Menzel
Poster at International Conference on Neuromorphic Computing and Engineering, Aachen, Germany, 3-6 June 2024
Xianyue Zhao; Kefeng Li; Ziang Chen; Andrea Dellith; Jan Dellith; Uwe Hübner; Christopher Bengel; Feng Liu; Stephan Menzel; Heidemarie Schmidt; Nan Du
Appl. Phys. Lett. 125, 083509 (2024), 21 August 2024
DOI: 10.1063/5.0213396
Xianyue Zhao; Jonas Ruchti; Christoph Frisch; Kefeng Li; Ziang Chen; Stephan Menzel; Rainer Waser; Heidemarie Schmidt; Ilia Polian; Michael Pehl; Nan Du
IEEE Transactions on Nanotechnology, 13 June 2024
Feng Liu; Xianyue Zhao; Ziang Chen; Christopher Bengel; Nan Du; Stephan Menzel
2024 IEEE International Symposium on Circuits and Systems (ISCAS), Singapore, 19-22 May 2024
Xianyue Zhao; Kefeng Li; Ziang Chen; Jan Dellith; Andrea Dellith; Marco Diegel; Daniel Blaschke; Stephan Menzel; Ilia Polian; Heidemarie Schmidt; Nan Du
J. Appl. Phys. 135, 135303 (2024), 4 April 2024
DOI: 10.1063/5.0196718
Feng Liu; Xianyue Zhao; Ziang Chen; Christopher Bengel; Nan Du; Stephan Menzel
30th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Istanbul, 4-7 December 2023
Ziang Chen; Xianyue Zhao; Christopher Bengel; Feng Liu; Kefeng Li; Heidemarie Schmidt; Stephan Menzel; Nan Du
Poster at MemriSys 2023, Torino, Italy, 5 - 9 Nov 2023
Christopher Bengel; Feng Liu; Ziang Chen; Xianyue Zhao; Rainer Waser; Heidemarie Schmidt; Nan Du; Stephan Menzel
Neuromorphic Computing and Engineering, 11 October 2023
Xianyue Zhao; Stephan Menzel; Ilia Polian; Heidemarie Schmidt; Nan Du
Nanomaterials, 10 April 2023
DOI: 10.3390/nano13081325
Ziang Chen; Guofu Zhang; Hao Cai; Christopher Bengel; Feng Liu; Xianyue Zhao; Shahar Kvatinsky; Heidemarie Schmidt; Rainer Waser; Stephan Menzel; Nan Du
Front. Electron. Mater, Sec. Semiconducting Materials and Devices, 04 October 2022
Christopher Bengel; Johannes Mohr; Stefan Wiefels; Abhairaj Singh; Anteneh Gebregiorgis; Rajendra Bishnoi; Said Hamdioui; Rainer Waser; Dirk Wouters; Stephan Menzel
Neuromorphic Computing and Engineering, 22 June 2022
Hao Cai; Ziang Chen; Xianyue Zhao; Christopher Bengel; Feng Liu; Heidemarie Schmidt; Stephan Menzel; Nan Du
2022 11th International Conference on Modern Circuits and Systems Technologies (MOCAST), Bremen, Germany, 8-10 June 2022
In the era of Big Data and the Internet of Things (IoT), the capability of cost-efficient real-time large-scale data analysis has been requested as the main prerequisites for the next generation of computing architecture. Memristive devices offer enormous potential for non-volatile memories and neuromorphic computing, and a rising interest is also aroused in using memristive technologies for in-memory computing applications. The proposed project MemDPU aims at the development of novel general purpose Domino Processing Unit (DPU) as unconventional in-memory-computing paradigm with high efficiency for data-intensive applications. This work focuses on the comprehensive comparative investigation of a variety of logic primitives based on abrupt and analog memristors and implements the DPU based computing system in both theoretical simulation and physical experiment domains.
Within MemDPU project, four logic concepts are determined in terms of the input and output state variables of logic operation, which are the fundamental classifications for DPU computing paradigm: memristance-input-memristance-output (MIMO),
voltage-input-voltage-output (VIVO), voltage-input-memristance-output (VIMO) and memristance-input-voltage-output (MIVO). A variety of binary Boolean logic families based on the defined logic concepts will be comprehensively studied by using analog switching memristors in comparison to abrupt switching memristors. Besides binary logic also ternary logic is considered in MemDPU project exploiting the multibit storage capabilities of memristors.
Based on a systematic study of various logic families and logic types, the novel DPU computing paradigm will be developed with MIMO as input and output logic gates, VIVO as the operation gate and MIVO/VIMO as the association gate between MIMO and VIVO. For achieving the maximum DPU system performance, an automatic generic synthesis tool is designed, which optimizes the sequential voltage patterns applied to the memristive cells for the application-oriented goal. Furthermore, as a demonstrator, an n-bit calculator, will be realized by adopting DPU computing system both in simulation and hardware implementation schemes in MemDPU project.
MemDPU is a joint project that will strongly benefit from the complementary collaboration of an experimentalist (Nan Du) and a theoretician (Stephan Menzel). Nan Du will provide competences in optimization and physical implementation of electroforming-free analog memristors, design and realization of memristive systems. Stephan Menzel will contribute his rich knowledge in theoretical simulation, optimization and modelling of abrupt memristive devices. Together, the applicants form a unique memristor-oriented research team that includes complementary abilities to comprehensively address the all relevant aspects in this project.