MemDPU

Domino Processing Unit: Towards Novel High Efficient In-Memory-Computing

Partner

Nan_Du_transparent

Dr.-Ing. Nan Du

FSU Jena

Stephan_Menzel_transparent

Dr.-Ing. Stephan Menzel

Forschungszentrum Jülich

Outcome

Review on Resistive Switching Devices Based on Multiferroic BiFeO3

Xianyue Zhao; Stephan Menzel; Ilia Polian; Heidemarie Schmidt; Nan Du

Nanomaterials, 10 April 2023

DOI: 10.3390/nano13081325

Realization of Memristor-aided Logic Gates with Analog Memristive Devices

Hao Cai; Ziang Chen; Xianyue Zhao; Christopher Bengel; Feng Liu; Heidemarie Schmidt; Stephan Menzel; Nan Du

2022 11th International Conference on Modern Circuits and Systems Technologies (MOCAST), 08-10 June 2022, Bremen, Germany

DOI: 10.1109/MOCAST54814.2022.9837637

Project Description

In the era of Big Data and the Internet of Things (IoT), the capability of cost-efficient real-time large-scale data analysis has been requested as the main prerequisites for the next generation of computing architecture. Memristive devices offer enormous potential for non-volatile memories and neuromorphic computing, and a rising interest is also aroused in using memristive technologies for in-memory computing applications. The proposed project MemDPU aims at the development of novel general purpose Domino Processing Unit (DPU) as unconventional in-memory-computing paradigm with high efficiency for data-intensive applications. This work focuses on the comprehensive comparative investigation of a variety of logic primitives based on abrupt and analog memristors and implements the DPU based computing system in both theoretical simulation and physical experiment domains.

Within MemDPU project, four logic concepts are determined in terms of the input and output state variables of logic operation, which are the fundamental classifications for DPU computing paradigm: memristance-input-memristance-output (MIMO),
voltage-input-voltage-output (VIVO), voltage-input-memristance-output (VIMO) and memristance-input-voltage-output (MIVO). A variety of binary Boolean logic families based on the defined logic concepts will be comprehensively studied by using analog switching memristors in comparison to abrupt switching memristors. Besides binary logic also ternary logic is considered in MemDPU project exploiting the multibit storage capabilities of memristors.

Based on a systematic study of various logic families and logic types, the novel DPU computing paradigm will be developed with MIMO as input and output logic gates, VIVO as the operation gate and MIVO/VIMO as the association gate between MIMO and VIVO. For achieving the maximum DPU system performance, an automatic generic synthesis tool is designed, which optimizes the sequential voltage patterns applied to the memristive cells for the application-oriented goal. Furthermore, as a demonstrator, an n-bit calculator, will be realized by adopting DPU computing system both in simulation and hardware implementation schemes in MemDPU project.

MemDPU is a joint project that will strongly benefit from the complementary collaboration of an experimentalist (Nan Du) and a theoretician (Stephan Menzel). Nan Du will provide competences in optimization and physical implementation of electroforming-free analog memristors, design and realization of memristive systems. Stephan Menzel will contribute his rich knowledge in theoretical simulation, optimization and modelling of abrupt memristive devices. Together, the applicants form a unique memristor-oriented research team that includes complementary abilities to comprehensively address the all relevant aspects in this project.

Further involved scientists

Feng_Liu_transparent

Feng Liu

Forschungszentrum Jülich

Xianyue_Zhao_transparent

Xianyue Zhao

FSU Jena

Ziang_Chen_transparent

Ziang Chen

FSU Jena