Memristive hybrid on-chip memory for a low-power RISC-V processor - Design and Implementation



Prof. Dr.-Ing. Dietmar Fey


Prof. Dr.-Ing. Christian Wenger

Project Description

The aim of the project is to demonstrate that the use of memristive ReRAM memories in close combination with flip-flops and SRAM memory in so-called hybrid non-volatile registers and memories can noticeably reduce energy consumption and power consumption in future processors.

This also requires adaptation of existing design tools so that complicated designs such as a processor can use memristive memories, precisely RRAMs, for automatic synthesis. This has not been the case to date.

The proof is to be provided by means of a simulation system to be developed, which will use online learning in neural networks to show that energy and power consumption are noticeably reduced by more energy-efficient reading in RRAMs and energy-efficient writing in RRAMs. The proof that the necessary extension of the design programs carried out in the project works correctly is to be provided by the production and measurement of synthesized chips.

Further involved scientists


Markus Fritscher

IHP Microelectronics GmbH, Frankfurt (Oder)


Johannes Kliemt

FAU Erlangen-Nürnberg


Huiqiao Zhang

FAU Erlangen-Nürnberg