Spitzeninnovationen auf der Embedded World Messe in Nürnberg vorgestellt

The embedded world fair, the leading international trade fair for embedded systems, concluded last week. Among the standout exhibitors was also MemrisTec, the research program dedicated to bring memristive devices toward smart technical systems. Our booth 5-140 at the fair proved to be a captivating destination for industry professionals and technology enthusiasts alike.

ReLoFeMris Simulator

At the end of the 1960s, Leon Chua created the term memristor, an artificial word made up of the words “memory” and “resistor”. According to Chua’s circuit theory, memristor includes all devices whose current/voltage curve runs through the point of origin of the coordinate system and thus, in contrast to other non-volatile memory elements such as ferrite core memories, have a squeezed hysteresis curve. As with all non-volatile memory elements, the state stored in the memristor is not lost even after the operating voltage is switched off.

In addition to the more familiar elements such as resistive ReRAMs (ReRAMs), phase change memories (PCMs) and spin-torque transfer magnetic resistive RAMs (STT-MRAM), this class of memristive components also includes so-called ferroelectric tunnel junction (FTJ) devices. Compared to the other variants mentioned, the latter have the great advantage of generating extremely low readout currents.

It is possible to use this advantage to build embedded AI architectures based on so-called hyperdimensional computing (HDC), which is a kind of alternative to deep neural networks.
In HDC systems, information, e.g. given in the form of individual vectors, is stored distributed in the entries of a very large vector, called a hypervector. Such HDC systems can be used, for example, to analyze EMG signals in order to recognize hand gestures. A large number of e.g. binary entries in the vectors is important.

E.g., such hypervectors can be stored in matrix-shaped crossbar structures. When recognizing a gesture, a large number of elements in a column may have to be read out in parallel and added up. To prevent the currents from becoming too large, it is advisable for the read-out elements to produce only small currents, and this is precisely the case with FTJs.

In order to build crossbar structures in highly integrated mixed-signal chips that can be realized with FTJs in the future, computer architecture studies must be carried out in advance. This allows the crossbar structures to be better evaluated qualitatively and quantitatively. One means of doing this is simulation.

For this reason, the Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU) has been working on the project “ReLoFemRis – Reconfigurable Logic and Multi-bit in-memory processing with ferroelectric memristors” as part of the priority program funded by the German Research Foundation (DFG SPP 2262).

In ReLoFemRis, the adaptation of FTJs for computer architectures has generally been researched in recent years and a device and architecture simulator has been developed for that in SystemC.

This simulator was presented at the booth. It has shown how a corresponding architecture can be used for hand gesture recognition.

AiML Demonstrator

Artificial Intelligence Memristive Logic (AiML) Technology is a pioneering memristor-based Computing-in-Memory (CIM) startup tailored for Edge AI applications. Through memristive arrays, it not only stores AI model weights directly on-chip but also conducts the matrix-matrix multiplications. In the embedded world landscape of 2024, the AiML demonstrator will showcase image classification capabilities with remarkable efficiency, boasting ultra-low power consumption tailored specifically for Edge AI deployments.

MEMMEA Emulator

The presented emulator opens the possibilities to characterize electrical properties of the proposed integrated chip and to measure biological samples with a robust system which is easy to modify. These measurements allows us to test different parameter settings and to determine the interaction between neural tissue and the used signal processing.

The emulator consists of certain PCBs with discrete electronic devices as well as a commercially available passive „Multi-Electrode-Array“ (MEA) and a simple passive „Memrisive-Array“ (MEMA) processed on a blank standard waver (with SiO2 coating).