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New Project LEOMEM: Radiation-Resistant In-Memory Computing for Space

Sending electronics into space is no small feat. In Low-Earth Orbit, radiation, temperature extremes, and the vacuum pose challenges that conventional memory simply cannot withstand. The LEOMEM project, part of the DFG Priority Program MemrisTec and funded by the DFG starting in 2025, is addressing these issues. Researchers at TU Munich, University of Rostock, and IHP – Leibniz-Institute for Innovative Microelectronics, led by Prof. Amelie Hagelauer, Prof. Marc Reichenbach, and Prof. Christian Wenger, are developing radiation-resistant RRAM-based memory cells, building on results from the earlier MIMEC project.

First prototype chips, combining enclosed layout transistors (ELTs) with RRAM devices, have already been fabricated at IHP. These cells will undergo multi-stage testing for total ionizing dose (TID), single event effects (SEE), and extreme temperatures. Could memory survive these harsh conditions while remaining energy-efficient? That is one of the key questions LEOMEM seeks to answer.

At the system level, behavioral data from the devices will feed into a design framework to explore secure and adaptive memory architectures. Adaptive error correction codes will work alongside analog control, digital interfaces, and controllers in a fully integrated ASIC prototype. The ultimate goal is a memory system optimized for reliability, energy efficiency, and performance in space missions, paving the way for the next generation of in-memory computing beyond Earth.

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New Project PrintMEM: Printable Memristive Logic for Flexible Sensors

How can electronic circuits become flexible enough to wrap around sensors in robotics, wearable medical devices, or smart systems? Researchers from Karlsruhe Institute of Technology (KIT) and Ruprecht-Karls-University Heidelberg, led by Prof.Jasmin Aghassi-Hagmann and Prof.Nima Taherinejad, are exploring this question as part of the DFG Priority Program MemrisTec. The PrintMEM project funded by the DFG since 2025 is advancing printed memristor technology, aiming to bring high-performance in-memory computing directly into flexible and low-power devices.

At the heart of PrintMEM are inorganic memristors made from metal oxides with particle admixtures, carefully designed to reduce variability between components. These tiny devices can switch states in just 100 nanoseconds—several orders of magnitude faster than conventional printed thin-film transistors. But speed is only part of the story. The researchers are investigating multiple circuit architectures—including IMPLY, MAGIG, FELIX OR, and SIXOR—and combining them into functional subunits like sorter circuits.

The project spans the entire development chain, from device fabrication and behavioral modeling to endurance testing and circuit design. By integrating these building blocks into printed logic components, PrintMEM seeks to demonstrate energy-efficient, reliable, and scalable electronics suitable for flexible sensors, robotics, and medical applications. Could this technology redefine how computation is integrated into next-generation devices? By pushing the limits of printable inorganic electronics, PrintMEM is opening a pathway toward highly adaptable and powerful edge-computing systems.

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New Project MuCoReMuCoRe: Multi-Context FPGAs Powered by Memristive MemoryNew Project MuCoRe

In an era where computing demands are constantly growing, the MuCoRe project is exploring how a single chip could handle multiple hardware configurations simultaneously. Researchers at the University of Rostock and IHP – Leibniz-Institute for Innovative Microelectronics, led by Prof. Marc Reichenbach and Prof. Christian Wenger, are developing multi-context FPGAs (MC-FPGAs) using multi-bit resistive RAM (RRAM) cells as part of the DFG Priority Program MemrisTec. Funded by the DFG starting in 2025, the project aims to combine the speed and flexibility of FPGAs with the efficiency and density of memristive memory.

At the heart of MuCoRe is the multi-level capability of RRAM cells. Each cell can store eight states, supporting up to three hardware configurations per cell and drastically reducing the area and power requirements compared to conventional SRAM-based designs. Specialized analog-to-digital converters (ADCs) provide reliable, energy-efficient readout, and the non-volatile nature of RRAM eliminates the need to maintain inactive configurations.

Beyond individual components, MuCoRe is taking a system-wide approach. The team is using open-source tools and iterative design methods to evaluate critical metrics, including area, power, and performance. By merging analog memristive memory with digital FPGA logic, the project is creating a flexible, energy-efficient computing platform. If successful, MuCoRe could redefine how reconfigurable digital systems are built, providing faster, more adaptable hardware for next-generation applications.

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Interntional Day of Women and Girls in Science

Science knows no gender, and we believe that diverse perspectives are essential to driving innovation and solving the world’s most pressing challenges. MemrisTec is dedicated to create opportunities for scientists from all genders to explore, learn and shape the future of computing.

💡 To all the young women out there dreaming of careers in STEAM: You belong in science, and your contributions will shape the world.

Let’s work together to ensure that every girl knows she can be a scientist, an innovator, and a leader in her field. 🌱✨

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MemrisTec at MEMRISYS in Seoul, Korea

Many members of the priority program MemrisTec attended the 7th International Conference on Memristive Materials, Devices & Systems (MEMRISYS 2024) that took place at in Seoul (Korea) from 10 to 13 November 2024.

A special success was the given Best Poster Award for Richard Schroedter presenting the poster “An ErMnO3 memristive spiking neuristor” for his team with the contributors Ahmet Şamil Demirkol, Rong Wu, Catherine Dubourdieu, and Ronald Tetzlaff.

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MemrisTec at Nature Conference on Neuromorphic Computing

The MemrisTec members Ilia Valov and John Paul Strachan (both from FZ Jülich) were choosen by the Nature editors to speak at the 2nd Nature Conference on Neuromorphic Computing in Shangri-La Beijing, China, from October 13, 2024 – October 16, 2024.

5 years after the 1st conference they will discuss in an interdisciplinary audience how to create more efficient and intelligent computing systems. Among the further speakers is also one member of the MemrisTec International Advisory Committee, Wei Lu from the University of Michigan, USA.

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Girls’Day on 25.04.2024

We would like to thank everyone who took part in our Girls’Day 2024! Dr. Carsten Knoll led an engaging hands-on session exploring artificial intelligence through object recognition using mini computers. The enthusiasm and curiosity of the young girls was truly inspiring. We hope the participants enjoyed the experience and learned some valuable insights which they can implement in their scientific journey.

Moreover, we look forward to more successful Girl’s Day events in the future.

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MemTDE News

MemrisTec Young Researcher Awards for MemTDE

The awards for the best presentation at the MemrisTec2024 workshop went to the young scientists from the project MemTDE (Memristive Time Difference Encoder):

Johannes Hellwig and Dimitris Spithouris from the Peter Grünberg Institute 7 at Forschungszentrum Jülich as well as Hugh Greatorex from CogniGron at the University of Groningen in the Netherlands were rated best in terms of their presentation skills by the jury from the MemrisTec Board.

The annual workshop of the MemrisTec priority program took place this year in Nuremberg at FAU Erlangen-Nürnberg. The host was Prof. Dr. Dietmar Fey. The location and time of the workshop were specifically chosen so that demonstrators created during the first funding phase could also be presented at the embedded world trade fair.

We wish the MemTDE project team all the best for the future!

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Events News

Cutting-Edge Innovations Unveiled at Embedded World Fair in Nuremberg

Spitzeninnovationen auf der Embedded World Messe in Nürnberg vorgestellt

The embedded world fair, the leading international trade fair for embedded systems, concluded last week. Among the standout exhibitors was also MemrisTec, the research program dedicated to bring memristive devices toward smart technical systems. Our booth 5-140 at the fair proved to be a captivating destination for industry professionals and technology enthusiasts alike.

ReLoFeMris Simulator

At the end of the 1960s, Leon Chua created the term memristor, an artificial word made up of the words “memory” and “resistor”. According to Chua’s circuit theory, memristor includes all devices whose current/voltage curve runs through the point of origin of the coordinate system and thus, in contrast to other non-volatile memory elements such as ferrite core memories, have a squeezed hysteresis curve. As with all non-volatile memory elements, the state stored in the memristor is not lost even after the operating voltage is switched off.

In addition to the more familiar elements such as resistive ReRAMs (ReRAMs), phase change memories (PCMs) and spin-torque transfer magnetic resistive RAMs (STT-MRAM), this class of memristive components also includes so-called ferroelectric tunnel junction (FTJ) devices. Compared to the other variants mentioned, the latter have the great advantage of generating extremely low readout currents.

It is possible to use this advantage to build embedded AI architectures based on so-called hyperdimensional computing (HDC), which is a kind of alternative to deep neural networks.
In HDC systems, information, e.g. given in the form of individual vectors, is stored distributed in the entries of a very large vector, called a hypervector. Such HDC systems can be used, for example, to analyze EMG signals in order to recognize hand gestures. A large number of e.g. binary entries in the vectors is important.

E.g., such hypervectors can be stored in matrix-shaped crossbar structures. When recognizing a gesture, a large number of elements in a column may have to be read out in parallel and added up. To prevent the currents from becoming too large, it is advisable for the read-out elements to produce only small currents, and this is precisely the case with FTJs.

In order to build crossbar structures in highly integrated mixed-signal chips that can be realized with FTJs in the future, computer architecture studies must be carried out in advance. This allows the crossbar structures to be better evaluated qualitatively and quantitatively. One means of doing this is simulation.

For this reason, the Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU) has been working on the project “ReLoFemRis – Reconfigurable Logic and Multi-bit in-memory processing with ferroelectric memristors” as part of the priority program funded by the German Research Foundation (DFG SPP 2262).

In ReLoFemRis, the adaptation of FTJs for computer architectures has generally been researched in recent years and a device and architecture simulator has been developed for that in SystemC.

This simulator was presented at the booth. It has shown how a corresponding architecture can be used for hand gesture recognition.

AiML Demonstrator

Artificial Intelligence Memristive Logic (AiML) Technology is a pioneering memristor-based Computing-in-Memory (CIM) startup tailored for Edge AI applications. Through memristive arrays, it not only stores AI model weights directly on-chip but also conducts the matrix-matrix multiplications. In the embedded world landscape of 2024, the AiML demonstrator will showcase image classification capabilities with remarkable efficiency, boasting ultra-low power consumption tailored specifically for Edge AI deployments.

MEMMEA Emulator

The presented emulator opens the possibilities to characterize electrical properties of the proposed integrated chip and to measure biological samples with a robust system which is easy to modify. These measurements allows us to test different parameter settings and to determine the interaction between neural tissue and the used signal processing.

The emulator consists of certain PCBs with discrete electronic devices as well as a commercially available passive „Multi-Electrode-Array“ (MEA) and a simple passive „Memrisive-Array“ (MEMA) processed on a blank standard waver (with SiO2 coating).

Impressions

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IFW Dresden appoints Prof. Dr. Anjana Devi as director of IMC

Prof. Dr. Anjana Devi, a distinguished expert on chemistry of functional nanoscale and 2D materials, has been appointed as the Director of the Institute for Materials Chemistry (IMC) at Leibniz Institute of Solid State and Materials Research Dresden (IFW). Concurrently, she is anticipated to be appointed with the prestigious role of Chair of Materials Chemistry at the Faculty of Chemistry and Food Chemistry at the Technical University of  Dresden (TU Dresden).

Professor Dr. Anjana Devi, an esteemed scientist of Indian origin, earned Doctorate from the Indian Institute of Science (IISc), Bangalore, India. Since 1998, she has been working with the Ruhr-University, Bochum, where she held the position of Professor of Inorganic Materials Chemistry since 2011. Her exceptional contributions to the field have been recognized internationally, for which she received an Honorary Doctorate from Aalto University, Finland.

Further details…