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MemTDE News

MemrisTec Young Researcher Awards for MemTDE

The awards for the best presentation at the MemrisTec2024 workshop went to the young scientists from the project MemTDE (Memristive Time Difference Encoder):

Johannes Hellwig and Dimitris Spithouris from the Peter Grünberg Institute 7 at Forschungszentrum Jülich as well as Hugh Greatorex from CogniGron at the University of Groningen in the Netherlands were rated best in terms of their presentation skills by the jury from the MemrisTec Board.

The annual workshop of the MemrisTec priority program took place this year in Nuremberg at FAU Erlangen-Nürnberg. The host was Prof. Dr. Dietmar Fey. The location and time of the workshop were specifically chosen so that demonstrators created during the first funding phase could also be presented at the embedded world trade fair.

We wish the MemTDE project team all the best for the future!

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Events News

Cutting-Edge Innovations Unveiled at Embedded World Fair in Nuremberg

Spitzeninnovationen auf der Embedded World Messe in Nürnberg vorgestellt

The embedded world fair, the leading international trade fair for embedded systems, concluded last week. Among the standout exhibitors was also MemrisTec, the research program dedicated to bring memristive devices toward smart technical systems. Our booth 5-140 at the fair proved to be a captivating destination for industry professionals and technology enthusiasts alike.

ReLoFeMris Simulator

At the end of the 1960s, Leon Chua created the term memristor, an artificial word made up of the words “memory” and “resistor”. According to Chua’s circuit theory, memristor includes all devices whose current/voltage curve runs through the point of origin of the coordinate system and thus, in contrast to other non-volatile memory elements such as ferrite core memories, have a squeezed hysteresis curve. As with all non-volatile memory elements, the state stored in the memristor is not lost even after the operating voltage is switched off.

In addition to the more familiar elements such as resistive ReRAMs (ReRAMs), phase change memories (PCMs) and spin-torque transfer magnetic resistive RAMs (STT-MRAM), this class of memristive components also includes so-called ferroelectric tunnel junction (FTJ) devices. Compared to the other variants mentioned, the latter have the great advantage of generating extremely low readout currents.

It is possible to use this advantage to build embedded AI architectures based on so-called hyperdimensional computing (HDC), which is a kind of alternative to deep neural networks.
In HDC systems, information, e.g. given in the form of individual vectors, is stored distributed in the entries of a very large vector, called a hypervector. Such HDC systems can be used, for example, to analyze EMG signals in order to recognize hand gestures. A large number of e.g. binary entries in the vectors is important.

E.g., such hypervectors can be stored in matrix-shaped crossbar structures. When recognizing a gesture, a large number of elements in a column may have to be read out in parallel and added up. To prevent the currents from becoming too large, it is advisable for the read-out elements to produce only small currents, and this is precisely the case with FTJs.

In order to build crossbar structures in highly integrated mixed-signal chips that can be realized with FTJs in the future, computer architecture studies must be carried out in advance. This allows the crossbar structures to be better evaluated qualitatively and quantitatively. One means of doing this is simulation.

For this reason, the Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU) has been working on the project “ReLoFemRis – Reconfigurable Logic and Multi-bit in-memory processing with ferroelectric memristors” as part of the priority program funded by the German Research Foundation (DFG SPP 2262).

In ReLoFemRis, the adaptation of FTJs for computer architectures has generally been researched in recent years and a device and architecture simulator has been developed for that in SystemC.

This simulator was presented at the booth. It has shown how a corresponding architecture can be used for hand gesture recognition.

AiML Demonstrator

Artificial Intelligence Memristive Logic (AiML) Technology is a pioneering memristor-based Computing-in-Memory (CIM) startup tailored for Edge AI applications. Through memristive arrays, it not only stores AI model weights directly on-chip but also conducts the matrix-matrix multiplications. In the embedded world landscape of 2024, the AiML demonstrator will showcase image classification capabilities with remarkable efficiency, boasting ultra-low power consumption tailored specifically for Edge AI deployments.

MEMMEA Emulator

The presented emulator opens the possibilities to characterize electrical properties of the proposed integrated chip and to measure biological samples with a robust system which is easy to modify. These measurements allows us to test different parameter settings and to determine the interaction between neural tissue and the used signal processing.

The emulator consists of certain PCBs with discrete electronic devices as well as a commercially available passive „Multi-Electrode-Array“ (MEA) and a simple passive „Memrisive-Array“ (MEMA) processed on a blank standard waver (with SiO2 coating).

Impressions

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News

IFW Dresden appoints Prof. Dr. Anjana Devi as director of IMC

Prof. Dr. Anjana Devi, a distinguished expert on chemistry of functional nanoscale and 2D materials, has been appointed as the Director of the Institute for Materials Chemistry (IMC) at Leibniz Institute of Solid State and Materials Research Dresden (IFW). Concurrently, she is anticipated to be appointed with the prestigious role of Chair of Materials Chemistry at the Faculty of Chemistry and Food Chemistry at the Technical University of  Dresden (TU Dresden).

Professor Dr. Anjana Devi, an esteemed scientist of Indian origin, earned Doctorate from the Indian Institute of Science (IISc), Bangalore, India. Since 1998, she has been working with the Ruhr-University, Bochum, where she held the position of Professor of Inorganic Materials Chemistry since 2011. Her exceptional contributions to the field have been recognized internationally, for which she received an Honorary Doctorate from Aalto University, Finland.

Further details…

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Elisabetta Chicca and SWIMS Project Awarded EUR 13.5 Million ERC Synergy Grant

Elisabetta Chicca and SWIMS Project Awarded EUR 13.5 Million ERC Synergy Grant

© Filippo Gander

The European Research Council (ERC) has granted a EUR 13.5 million Synergy Grant to the Stochastic Spiking Wireless Multimodal Sensory Systems (SWIMS) project, led by a consortium of four prominent scientists, including Professor Elisabetta Chicca from the University of Groningen.

SWIMS aims to revolutionize the design of smart wireless multimodal sensory systems, drawing inspiration from the nonlinear signaling observed in the nervous system of insects like bees. The project proposes a paradigm shift in digital signal processing, focusing on a novel stochastic analog spiking neuromorphic concept for Internet-of-Things (IoT) nodes.

The grant underscores the significance of SWIMS in addressing the rising energy consumption of digital infrastructure and recognizes its potential to bring about breakthroughs in energy efficiency for future IoT technologies. The international collaboration involves researchers from TU Dresden, UC Louvain, EPFL, and the University of Groningen, emphasizing the project’s global impact. This funding reaffirms the ERC’s confidence in SWIMS as a pioneering force in advancing sustainable and energy-efficient IoT systems.

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Impressions of the MemrisTec Summer School 2022

Impressions of the MemrisTec Summer School 2022

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SMACD’23 Best Paper Award for Mem²CNN project

SMACD’23 Best Paper Award on Emerging Technologies and Applications was presented to the paper entitled “A Simplified Variability-Aware VCM Memristor Model for Efficient Circuit Simulation”. A team of researchers from Technische Universität Dresden and FZ Jülich, Vasileios Ntinas, Dharmik Patel, Yongmin Wang, Ioannis Messaris, Dr. Vikas Rana, Stephan Menzel, Alon Ascoli, and Ronald Tetzlaff contributed to the paper. This project was funded within the DFG SPP MemrisTec.

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IEEE Transactions on Circuits and Systems Darlington Best Paper Award Recognizes Breakthrough in Memristive Neuronal Signal Generation

The prestigious IEEE Transactions on Circuits and Systems Darlington Best Paper Award has been granted to the research paper titled “How to Build a Memristive Integrate-and-Fire Model for Spiking Neuronal Signal Generation“. The paper, authored by Sung Mo Kang, Donguk Choi, Jason K Eshraghian, Peng Zhou, Jieun Kim, Bai-Sun Kong, Xiaojian Zhu, Ahmet Samil Demirkol, Alon Ascoli, Ronald Tetzlaff, Wei D Lu, and Leon O Chua, presents two compact memristive models for generating spiking neuronal signals using readily available low-cost components. The first neuron model introduced in the paper is called the Memristive Integrate and Fire (MIF) model. It enables neuronal signaling by utilizing two voltage levels: the spike-peak and the rest-potential. The second model presented was MIF2, which goes a step further by incorporating a third refractory voltage level during hyperpolarization, thereby promoting local adaptation.

One of the significant implications of this research is the potential design of a memristive solid-state brain with an estimation of its surface area and power consumption. This breakthrough is expected to encourage further experimental demonstrations of memristive circuits, paving the way for more accessible and cost-effective implementations. Analytical projections indicate that a memristive solid-state brain could be achieved within the surface area and volume equivalent to the median human brain.

The recognition of this outstanding research with the IEEE Transactions on Circuits and Systems Darlington Best Paper Award underscores its importance and impact on the field. The authors’ contribution to advancing the understanding and practical application of memristive circuits is commendable, and their work is expected to inspire further breakthroughs in the field of neuroscience and neuromorphic engineering.

View paper

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Dr.-Ing. Marc Reichenbach Appointed as Full Professor for Integrated Systems at the University of Rostock

Prof. Dr.-Ing. Marc Reichenbach, a well-experienced expert in processor architectures and processor development, has been appointed as a university full professor for “Integrated Systems” at the Faculty of Computer Science and Electrical Engineering at University of Rostock, effective from June 1st, 2023. Prof. Dr. Reichenbach also completed his Ph.D. in Computer Science and pursued a post-doctoral position at FAU Erlangen-Nürnberg.

His academic achievements demonstrate his dedication to advancing the field of computer science. Prior to his new role, he served as a substitute Professor at the BTU Cottbus for almost two years, further enriching his teaching and research experience. Marc’s extensive knowledge, combined with his international visibility and scientific skills, make him a valuable asset for the University of Rostock.

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Events News

MemrisTec @ Girl’s Day 2023

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MIMEC News

MemrisTec Young Researcher Award for Tommaso Rizzi

During the MemrisTec2023 workshop, Tommaso Rizzi received one of the two MemrisTec Young Researcher Awards 2023 for his paper „Exploring Process-Voltage-Temperature Variations Impact on 4T1R Multiplexers for Energy-aware Resistive RAM-based FPGAs“, published in 10/2022 at the IEEE International Integrated Reliability Workshop (IIRW) in South Lake Tahoe, CA, USA.

Within his paper Tommaso Rizzi evaluated a promising way towards the implementation of RRAM based devices coupled with large sized multiplexers into FPGAs. His results provide considerable improvements in terms of energy consumption and speed of modern FPGAs.

All the best for Tommaso Rizzi!